238 lines
7.2 KiB
C
238 lines
7.2 KiB
C
/* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
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* Mupen64plus - pif.c *
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* Mupen64Plus homepage: http://code.google.com/p/mupen64plus/ *
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* Copyright (C) 2002 Hacktarux *
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* *
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* This program is free software; you can redistribute it and/or modify *
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* it under the terms of the GNU General Public License as published by *
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* the Free Software Foundation; either version 2 of the License, or *
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* (at your option) any later version. *
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* *
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* This program is distributed in the hope that it will be useful, *
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* but WITHOUT ANY WARRANTY; without even the implied warranty of *
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
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* GNU General Public License for more details. *
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* *
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* You should have received a copy of the GNU General Public License *
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* along with this program; if not, write to the *
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* Free Software Foundation, Inc., *
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. *
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* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * */
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#include "usf/usf.h"
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#include "usf/usf_internal.h"
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#include "pif.h"
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#include "n64_cic_nus_6105.h"
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#include "si_controller.h"
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#include "api/m64p_types.h"
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#include "api/callbacks.h"
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#include "memory/memory.h"
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#include "r4300/r4300_core.h"
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#include "r4300/cp0.h"
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#include "r4300/interupt.h"
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#include <string.h>
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//#define DEBUG_PIF
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#ifdef DEBUG_PIF
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void print_pif(usf_state_t * state, struct pif* pif)
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{
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int i;
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for (i=0; i<(64/8); i++)
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DebugMessage(state, M64MSG_INFO, "%x %x %x %x | %x %x %x %x",
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pif->ram[i*8+0], pif->ram[i*8+1],pif->ram[i*8+2], pif->ram[i*8+3],
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pif->ram[i*8+4], pif->ram[i*8+5],pif->ram[i*8+6], pif->ram[i*8+7]);
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}
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#endif
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static void process_cart_command(usf_state_t * state, struct pif* pif, uint8_t* cmd)
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{
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switch (cmd[2])
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{
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case PIF_CMD_STATUS: break;
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case PIF_CMD_EEPROM_READ: break;
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case PIF_CMD_EEPROM_WRITE: break;
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case PIF_CMD_AF_RTC_STATUS: break;
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case PIF_CMD_AF_RTC_READ: break;
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case PIF_CMD_AF_RTC_WRITE: break;
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default:
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DebugMessage(state, M64MSG_ERROR, "unknown PIF command: %02x", cmd[2]);
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}
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}
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void init_pif(struct pif* pif)
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{
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memset(pif->ram, 0, PIF_RAM_SIZE);
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}
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int read_pif_ram(void* opaque, uint32_t address, uint32_t* value)
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{
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struct si_controller* si = (struct si_controller*)opaque;
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uint32_t addr = pif_ram_address(address);
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if (addr >= PIF_RAM_SIZE)
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{
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DebugMessage(si->r4300->state, M64MSG_ERROR, "Invalid PIF address: %08x", address);
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*value = 0;
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return -1;
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}
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memcpy(value, si->pif.ram + addr, sizeof(*value));
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*value = sl(*value);
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return 0;
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}
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int write_pif_ram(void* opaque, uint32_t address, uint32_t value, uint32_t mask)
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{
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struct si_controller* si = (struct si_controller*)opaque;
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uint32_t addr = pif_ram_address(address);
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if (addr >= PIF_RAM_SIZE)
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{
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DebugMessage(si->r4300->state, M64MSG_ERROR, "Invalid PIF address: %08x", address);
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return -1;
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}
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masked_write((uint32_t*)(&si->pif.ram[addr]), sl(value), sl(mask));
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if ((addr == 0x3c) && (mask & 0xff))
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{
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if (si->pif.ram[0x3f] == 0x08)
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{
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si->pif.ram[0x3f] = 0;
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update_count(si->r4300->state);
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if (si->r4300->state->g_delay_si)
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add_interupt_event(si->r4300->state, SI_INT, /*0x100*/0x900);
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else
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signal_rcp_interrupt(si->r4300, SI_INT);
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}
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else
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{
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update_pif_write(si);
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}
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}
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return 0;
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}
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void update_pif_write(struct si_controller* si)
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{
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struct pif* pif = &si->pif;
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char challenge[30], response[30];
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int i=0, channel=0;
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if (pif->ram[0x3F] > 1)
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{
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switch (pif->ram[0x3F])
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{
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case 0x02:
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#ifdef DEBUG_PIF
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DebugMessage(si->r4300->state, M64MSG_INFO, "update_pif_write() pif_ram[0x3f] = 2 - CIC challenge");
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#endif
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// format the 'challenge' message into 30 nibbles for X-Scale's CIC code
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for (i = 0; i < 15; i++)
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{
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challenge[i*2] = (pif->ram[48+i] >> 4) & 0x0f;
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challenge[i*2+1] = pif->ram[48+i] & 0x0f;
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}
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// calculate the proper response for the given challenge (X-Scale's algorithm)
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n64_cic_nus_6105(challenge, response, CHL_LEN - 2);
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pif->ram[46] = 0;
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pif->ram[47] = 0;
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// re-format the 'response' into a byte stream
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for (i = 0; i < 15; i++)
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{
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pif->ram[48+i] = (response[i*2] << 4) + response[i*2+1];
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}
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// the last byte (2 nibbles) is always 0
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pif->ram[63] = 0;
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break;
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case 0x08:
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#ifdef DEBUG_PIF
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DebugMessage(si->r4300->state, M64MSG_INFO, "update_pif_write() pif_ram[0x3f] = 8");
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#endif
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pif->ram[0x3F] = 0;
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break;
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default:
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DebugMessage(si->r4300->state, M64MSG_ERROR, "error in update_pif_write(): %x", pif->ram[0x3F]);
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}
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return;
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}
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while (i<0x40)
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{
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switch (pif->ram[i])
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{
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case 0x00:
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channel++;
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if (channel > 6) i=0x40;
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break;
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case 0xFF:
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break;
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default:
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if (!(pif->ram[i] & 0xC0))
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{
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if (channel < 4)
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{
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process_controller_command(&pif->controllers[channel], &pif->ram[i]);
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}
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else if (channel == 4)
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process_cart_command(si->r4300->state, pif, &pif->ram[i]);
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else
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DebugMessage(si->r4300->state, M64MSG_ERROR, "channel >= 4 in update_pif_write");
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i += pif->ram[i] + (pif->ram[(i+1)] & 0x3F) + 1;
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channel++;
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}
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else
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i=0x40;
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}
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i++;
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}
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//pif->ram[0x3F] = 0;
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}
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void update_pif_read(struct si_controller* si)
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{
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struct pif* pif = &si->pif;
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int i=0, channel=0;
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while (i<0x40)
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{
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switch (pif->ram[i])
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{
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case 0x00:
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channel++;
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if (channel > 6) i=0x40;
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break;
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case 0xFE:
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i = 0x40;
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break;
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case 0xFF:
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break;
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case 0xB4:
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case 0x56:
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case 0xB8:
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break;
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default:
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if (!(pif->ram[i] & 0xC0))
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{
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if (channel < 4)
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{
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read_controller(&pif->controllers[channel], &pif->ram[i]);
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}
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i += pif->ram[i] + (pif->ram[(i+1)] & 0x3F) + 1;
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channel++;
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}
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else
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i=0x40;
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}
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i++;
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}
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}
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