109 lines
3.3 KiB
C
109 lines
3.3 KiB
C
/******************************************************************************\
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* Authors: Iconoclast *
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* Release: 2013.12.12 *
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* License: CC0 Public Domain Dedication *
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* *
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* To the extent possible under law, the author(s) have dedicated all copyright *
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* and related and neighboring rights to this software to the public domain *
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* worldwide. This software is distributed without any warranty. *
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* *
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* You should have received a copy of the CC0 Public Domain Dedication along *
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* with this software. *
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* If not, see <http://creativecommons.org/publicdomain/zero/1.0/>. *
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\******************************************************************************/
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#include <stdio.h>
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#include <stdlib.h>
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#include <stdint.h>
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#include <string.h>
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#include "../usf.h"
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#include "../dma.h"
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#include "../exception.h"
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#include "../main.h"
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#include "../memory.h"
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#include "../registers.h"
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#include "../usf_internal.h"
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#undef JUMP
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#include "config.h"
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#include "rsp.h"
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#include "../rsp_hle/hle.h"
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void real_run_rsp(usf_state_t * state, uint32_t cycles)
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{
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(void)cycles;
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if (SP_STATUS_REG & 0x00000003)
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{
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message(state, "SP_STATUS_HALT", 3);
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return;
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}
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switch (*(unsigned int *)(state->DMEM + 0xFC0))
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{ /* Simulation barrier to redirect processing externally. */
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case 0x00000002: /* OSTask.type == M_AUDTASK */
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if (state->enable_hle_audio == 0)
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break;
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hle_execute(&state->hle);
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SP_STATUS_REG |= 0x00000203;
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if (SP_STATUS_REG & 0x00000040) /* SP_STATUS_INTR_BREAK */
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{
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MI_INTR_REG |= 0x00000001; /* VR4300 SP interrupt */
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CheckInterrupts(state);
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}
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return;
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}
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run_task(state);
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return;
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}
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int32_t init_rsp(usf_state_t * state)
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{
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state->CR[0x0] = &SP_MEM_ADDR_REG;
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state->CR[0x1] = &SP_DRAM_ADDR_REG;
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state->CR[0x2] = &SP_RD_LEN_REG;
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state->CR[0x3] = &SP_WR_LEN_REG;
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state->CR[0x4] = &SP_STATUS_REG;
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state->CR[0x5] = &SP_DMA_FULL_REG;
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state->CR[0x6] = &SP_DMA_BUSY_REG;
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state->CR[0x7] = &SP_SEMAPHORE_REG;
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state->CR[0x8] = &DPC_START_REG;
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state->CR[0x9] = &DPC_END_REG;
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state->CR[0xA] = &DPC_CURRENT_REG;
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state->CR[0xB] = &DPC_STATUS_REG;
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state->CR[0xC] = &DPC_CLOCK_REG;
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state->CR[0xD] = &DPC_BUFBUSY_REG;
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state->CR[0xE] = &DPC_PIPEBUSY_REG;
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state->CR[0xF] = &DPC_TMEM_REG;
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hle_init(&state->hle,
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state->N64MEM,
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state->DMEM,
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state->IMEM,
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&MI_INTR_REG,
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&SP_MEM_ADDR_REG,
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&SP_DRAM_ADDR_REG,
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&SP_RD_LEN_REG,
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&SP_WR_LEN_REG,
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&SP_STATUS_REG,
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&SP_DMA_FULL_REG,
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&SP_DMA_BUSY_REG,
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&SP_PC_REG,
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&SP_SEMAPHORE_REG,
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&DPC_START_REG,
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&DPC_END_REG,
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&DPC_CURRENT_REG,
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&DPC_STATUS_REG,
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&DPC_CLOCK_REG,
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&DPC_BUFBUSY_REG,
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&DPC_PIPEBUSY_REG,
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&DPC_TMEM_REG,
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state);
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return 0;
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}
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